
1. Field of the Invention
The present invention relates generally to semiconductor device assemblies, or so-called xe2x80x9cmulti-chip modulesxe2x80x9d, and, more specifically, to multi-chip modules in which two or more semiconductor devices are stacked relative to one another. In particular, the present invention relates to stacked semiconductor device assemblies in which the upper semiconductor device of an adjacent pair of semiconductor devices at least partially overlies discrete conductive elements protruding above the lower semiconductor device of the adjacent pair and the distances between adjacent, stacked semiconductor devices are determined, at least in part, by a quantity of adhesive material interposed therebetween.
2. Background of Related Art
In order to conserve the amount of surface area, or xe2x80x9creal estatexe2x80x9d, consumed on a carrier substrate, such as a circuit board, by semiconductor devices connected thereto, various types of increased density packages have been developed. Among these various types of packages is the so-called xe2x80x9cmulti-chip modulexe2x80x9d (MCM). Some types of multi-chip modules include assemblies of semiconductor devices that are stacked one on top of another. The amount of surface area on a carrier substrate that may be saved by stacking semiconductor devices is readily apparent-a stack of semiconductor devices consumes roughly the same amount of real estate on a carrier substrate as a single, horizontally oriented semiconductor device or semiconductor device package.
Due to the disparity in processes that are used to form different types of semiconductor devices (e.g., the number and order of various process steps), the incorporation of different types of functionality into a single semiconductor device has proven very difficult to actually reduce to practice. Even in cases where semiconductor devices that carry out multiple functions can be fabricated, multi-chip modules that include semiconductor devices with differing functions (e.g., memory, processing capabilities, etc.) are often much more desirable since the separate semiconductor devices may be fabricated independently and later assembled with one another much more quickly and cost-effectively (e.g., lower production costs due to higher volumes and lower failure rates).
Multi-chip modules may also contain a number of semiconductor devices that perform the same function, effectively combining the functionality of all of the semiconductor devices thereof into a single package.
An example of a conventional, stacked multi-chip module includes a carrier substrate, a first, larger semiconductor device secured to the carrier substrate, and a second, smaller semiconductor device positioned over and secured to the first semiconductor device. The second semiconductor device does not overlie bond pads of the first semiconductor device and, thus, the second semiconductor device does not cover bond wires that electrically connect bond pads of the first semiconductor device to corresponding contacts or terminals of the carrier substrate. As the bond pads of each lower semiconductor device are not covered by the next higher semiconductor device, vertical spacing between the semiconductor devices is not important. Thus, any suitable adhesive may be used to secure the semiconductor devices to one another. Such a multi-chip module is disclosed and illustrated in U.S. Pat. No. 6,212,767, issued to Tandy on Apr. 10, 2001 (hereinafter xe2x80x9cthe ""767 Patentxe2x80x9d). As the sizes of the semiconductor devices of such a multi-chip module must continue to decrease as they are positioned increasingly higher on the stack, the obtainable heights of such multi-chip modules become severely limited.
Another example of a conventional multi-chip module is described in U.S. Pat. No. 5,323,060, issued to Fogal et al. on Jun. 21, 1994 (hereinafter xe2x80x9cthe ""060 Patentxe2x80x9d). The multi-chip module of the ""060 Patent includes a carrier substrate with semiconductor devices disposed thereon in a stacked arrangement. The individual semiconductor devices of each multi-chip module may be the same size or different sizes, with upper semiconductor devices being either smaller or larger than underlying semiconductor devices. Adjacent semiconductor devices of each of the multi-chip modules disclosed in the ""060 Patent are secured to one another with an adhesive layer. The thickness of each adhesive layer well exceeds the loop heights of wire bonds protruding from a semiconductor device upon which that adhesive layer is to be positioned. Accordingly, the presence of each adhesive layer prevents the back side of an overlying, upper semiconductor device from contacting bond wires that protrude from an immediately underlying, lower semiconductor device of the multi-chip module. The adhesive layers of the multi-chip modules disclosed in the ""060 Patent do not encapsulate or otherwise cover any portion of the bond wires that protrude from any of the lower semiconductor devices. It does not appear that the inventors named on the ""060 Patent were concerned with overall stack heights. Thus, the multi-chip modules of the ""060 Patent may be undesirably thick due to the use of thick spacers or adhesive structures between each adjacent pair of semiconductor devices, resulting in wasted adhesive and excessive stack height.
A similar but more compact multi-chip module is disclosed in U.S. Pat. Re. 36,613, issued to Ball on Mar. 14, 2000 (hereinafter xe2x80x9cthe ""613 Patentxe2x80x9d). The multi-chip module of the ""613 Patent includes many of the same features as those disclosed in the ""060 Patent, including adhesive layers of carefully controlled thicknesses that space vertically adjacent semiconductor devices apart a greater distance than the loop heights of wire bonds protruding from the lower of the adjacent dice. The use of thinner bond wires with low-loop profile wire bonding techniques permits adjacent semiconductor devices of the multi-chip module disclosed in the ""060 Patent to be positioned more closely to one another than adjacent semiconductor devices of the multi-chip modules disclosed in the ""060 Patent. Nonetheless, an undesirably large amount of additional space may remain between the tops of the bond wires protruding from one semiconductor device and the back side of the next higher semiconductor device of such a stacked multi-chip module.
Conventionally, when a particular amount of spacing is needed between semiconductor devices to separate discrete conductive elements, such as bond wires, that protrude above an active surface of one semiconductor device from the back side of the next higher semiconductor device, the semiconductor devices of stacked multi-chip modules have been separated from one another with spacers. Exemplary spacers that have been used in stacked semiconductor device arrangements have been formed from dielectric-coated silicon or a polyimide film. An adhesive material typically secures such a spacer between adjacent semiconductor devices. The use of such preformed spacers is somewhat undesirable since an additional alignment and assembly step is required for each such spacer. Proper alignment of a preformed spacer with a semiconductor device requires that the spacer not be positioned over bond pads of the semiconductor device. In addition, if a preformed spacer is placed on the surface of a semiconductor device that has already been electrically connected to a substrate, the spacer must be positioned in such a manner that the often delicate discrete conductive elements, such as bond wires, extending from the bond pads of the semiconductor device not be damaged. As those of skill in the art are aware, improper alignment and placement of such a preformed spacer may increase the likelihood that a semiconductor device may be damaged, thereby decreasing overall product yields.
The vertical distance that adjacent semiconductor devices of a stacked type multi-chip module are spaced apart from one another may be reduced by arranging the immediately underlying semiconductor devices such that upper semiconductor devices are not positioned over bond pads of immediately lower semiconductor devices or bond wires protruding therefrom. Thus, adjacent semiconductor devices may be spaced apart from one another a distance that is about the same as or less than the loop heights of the wire bonds that protrude above the active surface of the lower semiconductor device. U.S. Pat. No. 6,051,886, issued to Fogal et al. on Apr. 18, 2000 (hereinafter xe2x80x9cthe ""886 Patentxe2x80x9d), discloses such a multi-chip module. According to the ""886 Patent, wire bonding is not conducted until all of the semiconductor devices of such a multi-chip module have been assembled with one another and with the underlying carrier substrate. The semiconductor devices of the multi-chip modules disclosed in the ""886 Patent must have bond pads that are arranged on opposite peripheral edges. Semiconductor devices with bond pads positioned adjacent the entire peripheries thereof could not be used in the multi-chip modules of the ""886 Patent. This is a particularly undesirable limitation due to the ever-increasing feature density of state-of-the-art semiconductor devices, which is often accompanied by a subsequent need for an ever-increasing number of bond pads on semiconductor devices.
In view of the foregoing, it appears that a method for forming stacked semiconductor device assemblies which reduces the likelihood of damage to semiconductor devices and associated wire bonds, as well as provides flexibility in bond pad number and placement, would be useful.
The present invention includes semiconductor device assemblies, as well as a method for assembling semiconductor devices in a stacked arrangement.
A semiconductor device assembly incorporating teachings of the present invention includes a first semiconductor device with discrete conductive elements protruding over at least a portion of an active surface thereof, adhesive material over the active surface, and a second semiconductor device positioned at least partially over the first semiconductor device, as well as at least partially over at least some discrete conductive elements protruding above the active surface of the first semiconductor device. The adhesive material is dispensed or applied in an amount substantially equal to a predetermined volume that spaces the first and second semiconductor devices apart from one another by a distance substantially the same as a predetermined distance that maintains electrical isolation between the discrete conductive elements protruding over the active surface of the first semiconductor device and the back side of the second semiconductor device while minimizing the height of the assembly.
The semiconductor device assembly may also include a substrate, such as a circuit board, an interposer, another semiconductor device, or leads, that includes contact areas to which bond pads of at least the first semiconductor device are electrically connected.
The discrete conductive elements that protrude above the active surface of the first semiconductor device may be electrically connected to corresponding contact areas of a substrate, such as a circuit board, an interposer, another semiconductor device, or leads. Alternatively, the discrete conductive elements may themselves comprise leads (e.g., in a leads-over-chip (LOC) type arrangement with the first semiconductor device).
Portions of the semiconductor device assembly may be encapsulated. For example, the first and second semiconductor devices, as well as portions of a substrate, if any, that are located adjacent to the first semiconductor device and discrete conductive elements extending between those portions of a substrate and the first and second semiconductor devices, may be partially or fully covered with an encapsulant.
A first exemplary embodiment of a method for forming an assembly according to the present invention includes providing a first semiconductor device with discrete conductive elements protruding at least partially over an active surface thereof, placing an amount substantially equal to a predetermined volume of at least partially unconsolidated adhesive material on the active surface, and positioning a second semiconductor device over the adhesive material. Alternatively, the adhesive material may be applied to a back side of the second semiconductor device before placing the second semiconductor device over the first semiconductor device.
Various types of adhesive materials, including, without limitation, epoxies, silicones, silicone-carbon resins, polyimides, and polyurethanes, may be used.
The volume of the adhesive material is selected to space the first and second semiconductor devices a distance substantially the same as a predetermined distance apart from one another. Various criteria, which may include one or more of the viscosity of the adhesive material, surface tension of the adhesive material, shrinkage or expansion of the adhesive material upon curing, the surface area to which the adhesive material is applied, the weight of the second semiconductor device, and the force applied to the second semiconductor device upon positioning thereof, may factor into the predetermined distance that may be achieved with a particular volume of a specific type of adhesive material. The adhesive material preferably has a viscosity and/or surface tension that will prevent the adhesive material from flowing off of the active surface of the first semiconductor device and enable the adhesive material to support the second semiconductor device positioned thereon while maintaining electrical isolation between the back side of the second semiconductor device and the discrete conductive elements that protrude over the active surface of the first semiconductor device.
When the first and second semiconductor devices are spaced apart substantially a set distance from one another, which set distance may differ from the predetermined distance if an adhesive material is employed that expands or shrinks upon curing, the adhesive material may be cured to at least a semisolid state.
In a second exemplary embodiment of assembly method incorporating teachings of the present invention, a first semiconductor device is provided that includes discrete conductive elements protruding above an active surface thereof, a second semiconductor device is positioned at least partially over the first semiconductor device, and a predetermined quantity of adhesive material is introduced between the first and second semiconductor devices. The second semiconductor device may be at least temporarily secured to the first semiconductor device by way of a small quantity of adhesive material, such as an adhesive polymer, solder flux, or the like, which may, for example, be placed on a surface of the first semiconductor device, the second semiconductor device, and/or one or more discrete conductive elements prior to positioning the second semiconductor device over the first semiconductor device. In positioning the second semiconductor device at least partially over the first semiconductor device, the back side of the second semiconductor device may rest upon portions of the discrete conductive elements that protrude above the active surface of the first semiconductor device.
The discrete conductive elements that protrude above the active surface of the first semiconductor device may be electrically connected to corresponding contact areas of a substrate, such as a circuit board, an interposer, another semiconductor device, or leads. Alternatively, the discrete conductive elements may themselves comprise leads (e.g., in a leads-over-chip (LOC) type arrangement with the first semiconductor device).
The amount of adhesive material that is introduced between the first and second semiconductor devices spaces the first and second semiconductor devices a distance substantially the same as a predetermined distance apart from one another. Various criteria, such as the viscosity of the adhesive material, the surface tension of the adhesive material, shrinkage or expansion of the adhesive material upon curing, the surface area to which the adhesive material is applied, the weight of the second semiconductor device, the force applied to the second semiconductor die upon placement thereof, or discrete conductive elements positioned between the first and second semiconductor dice, may factor into the predetermined distance that may be achieved with a particular volume of a specific type of adhesive material.
The adhesive material preferably has a viscosity that facilitates introduction thereof between the first and second semiconductor devices and, possibly, around portions of discrete conductive elements between the first and second semiconductor devices without resulting in the formation of voids therein. The wetting properties of an adhesive material may facilitate spreading thereof over the active surface of the first semiconductor device and the back side of the second semiconductor device, as well as capillary action, or xe2x80x9cwickingxe2x80x9d through the spaces between the first and second semiconductor devices and around the portions of discrete conductive elements located between the first and second semiconductor devices. Spreading of the adhesive material may be aided by application of heat thereto or by mechanical vibration of the assembly. When a fixed quantity of adhesive material that is smaller than the volume between the first and second semiconductor devices is used, the surface tension of the adhesive material may cause the distance between the first and second semiconductor devices to decrease as the adhesive material spreads therebetween, thereby decreasing the overall height of the assembly substantially to the predetermined distance therebetween.
Upon being introduced between the first and second semiconductor devices, the predetermined volume of adhesive material may lift the back side of the second semiconductor device off of the discrete conductive elements or may coat portions of the discrete conductive elements that are located adjacent to the back side of the second semiconductor device, or a combination thereof may be used to electrically isolate the back side of the second semiconductor device from underlying discrete conductive elements. The distance the first and second semiconductor devices are spaced apart once the predetermined volume of adhesive material has been introduced therebetween may or may not be the same as the predetermined distance, depending upon whether the adhesive material shrinks or expands upon curing.
In the event that the predetermined quantity of adhesive will cause the back side of the second semiconductor device to come to rest upon discrete conductive elements protruding above the active surface of the first semiconductor device, it is preferred that the back side of the second semiconductor device and the discrete conductive elements be electrically isolated from one another, for example, by way of a dielectric (e.g., adhesive material, dielectric oxide, etc.) coating on at least portions of the back side of the second semiconductor device that contact discrete conductive elements, a dielectric coating on at least portions of the discrete conductive elements that contact the back side, or some combination thereof.
When the adhesive material is cured, the first and second semiconductor devices are spaced apart from one another a distance that is substantially the same as the predetermined distance. Once the adhesive material cures, it may provide some physical support to the second semiconductor device. Bond pads of the second semiconductor device may then be electrically connected to one or both of corresponding contact areas of the substrate and corresponding bond pads of the first semiconductor device.
Of course, assemblies incorporating teachings of the present invention may include more than two semiconductor devices in stacked arrangement.
Once the semiconductor devices of such an assembly have been assembled with one another and electrically connected with a substrate or with one another, the assembly may be packaged, as known in the art.
Other features and advantages of the present invention will become apparent to those of ordinary skill in the art through consideration of the ensuing description, the accompanying drawings, and the appended claims.